IT History Society Blog

Ted Hoff: Significant Omissions from Malone’s Intel Trinity Book

September 25th, 2014 by Alan Weissberger

Written by Ted Hoff, PhD and edited by Alan J. Weissberger

Please refer to earlier post on Errors and Corrections to Malone’s book.

General omission:

Malone omits why I was hired at Intel as I was not a chip designer.  The reason was Bob Noyce’s view that LSI circuits were moving in the direction of systems on a chip, and that Intel should have some in-house systems engineering expertise.  Noyce asked Jim Angell, a EE Professor at Stanford who had consulted for Fairchild, to recommend some candidates.  I believe he gave Noyce three names, and I was the only one of those not working for Fairchild.  Noyce then called to invite me to join Intel.

 

# ] PAGE OBJECTION/SIGNIFICANCE

1] 54 Gordon Moore’s reflow patent covered a significant step in making the silicon gate process manufacturable by preventing cracking of the metal layer and thereby improving yield.

2] 55 Malone mentions Max Palevsky, but omits his connection to Scientific Data Systems, of which he was a co-founder in 1961. He sold the company to Xerox in 1969. His opinions were especially valuable, coming from the perspective of a computer company executive.

3] 121 Creative confrontation should be attributed to Andy Grove–and the emphasis should be on “creative.”

4] 128 Andy Grove played a major role in establishing that R&D had to work hand in hand with production. All three men said that at Fairchild, R&D would develop some new process only to have production resist adopting it.

5] 129 Andy Grove instituted “management by objectives,” which required progress reports to include predictions of future developments as well as past accomplishments. In subsequent reports, accomplishments had to be compared with the prior predictions. That discipline helped Intel’s engineers and management become much better at predicting progress and scheduling product development.

6] 134 Why does Malone say that the 3101 semiconductor memory came out in less than 18 months after Intel’s founding when it was approximately one year?

7] 136 Malone’s quote of Gordon Moore’s description of MOS is somewhat garbled. Gordon was talking about Intel’s MOS, which used the silicon gate process, not most other companies’ MOS products, which used metal gate.

8] 138 Malone mentions flash memory, but how was it developed?

9] 138 Malone describes Gordon Moore’s goal for an 1102 DRAM replacement to have no overlap with the Honeywell design, but makes no mention of how that was to be done. See page 156 below for more details.

10] 146 Malone omits the differences between a calculator chip set and a CPU oriented chip set. Consider the typical calculator set using a printer, and including a printer control chip. Should it be desired to use a different printer, a new printer control chip would be required–involving circuit design, a new chip layout, chip manufacturing and testing, as well as circuit board design to use the new printer controller chip. Those steps might take months, and involve tens of thousands of dollars of research and development. With a CPU approach, the new printer would typically require an afternoon of programming, the wiring of a new connection cable and the burning of a new EPROM–all taking less than a day.

11] 149 Malone omits why Intel would consider undertaking a custom chip job–which had the potential of delaying its development of semiconductor memory, Intel’s primary corporate goal. The reason Intel took the custom chip project (from Busicom) was concern about the rate at which semiconductor memory would be adopted by its target customers and to generate needed revenue in the interim. A custom job was expected to generate revenue much more quickly than semiconductor memory components.

12] 149 The details of the Busicom agreement–60,000 kits, price per kit not to exceed $50.00 should be presented at this point in the narration, i.e. at the time of the April, 1969 agreement, not later.

13] 151 In the early days of Intel, Bob Noyce frequently discussed many concepts–various aspects of computers, possible ways to implement bipolar ROM (one led to a patent), and other new and useful ways to use semiconductor technology. Those discussions had nothing to do with microprocessor chip set definition, design or development.

14] 153 Malone claims Bob Noyce had gone renegade–but omits what Bob should have done regarding the Busicom agreement and its problems. Should he have abandoned the agreement and walked away from a multi-million dollar order that Intel needed, or should he have just gone ahead and risked bankrupting the company trying to fulfill the Busicom agreement?

15] 153 Malone is incorrect in stating I felt I lacked skill in software. He omits that Intel’s MOS design team used a simulation program I had written in much of their design work. That program, initially run on an outside time-sharing service, was used so much that eventually Intel purchased a PDP-10 computer system primarily to run that simulation program. I have a copy of a memo I had written in 1975, discussing the merits of some proposed changes to the program. That proves the program was still being used seven years after Intel started operations.

16] 153 Malone omits the series of steps proposed in an effort to simplify the Busicom chip set. They ultimately led to the 4004 architecture (which was not a copy of a minicomputer as Malone claims). Those steps included breaking down the floating point arithmetic into digit by digit steps by making greater use of ROM; then noting that BCD arithmetic could be done by combining a binary step with BCD correction, thereby allowing the underlying processor to be a binary device (simpler than BCD); replacing shift-register memory with DRAM, which would allow simplifying the memory control logic while speeding up operations and reducing transistors per bit from six to theree; and noting that a simple binary processor with ROM could perform many of the operations being implemented by separate chips.

Also omitted is a definition of a CPU as used at Intel: a CPU has two major sections: one performs program sequence control with instruction fetching and interpretation; the second performs data manipulation as specified by each fetched and interpreted instruction. Bit slice chips only performed a portion of the latter function.

17] 153 Malone mentions that the Intel concept developed by Stan Mazor and myself would be a 4-chip design, but omits that it was an alternate to Busicom’s 10 to 12 chip design yet would still perform all the functions provided by the Busicom set.

18] 154 Malone describes Bob Graham’s letter to Busicom of September 16, 1969, as a “note.” He omits that it included price quotes for kits based on Busicom’s chip set and for Intel’s proposed chip set. It also included specifications for Intel’s chip set as well as the proposed instruction set for what would become the 4004 CPU chip.

19] 154 In saying that the Intel approach would involve a lot of sofware yet to be written, Malone omits that the Busicom chip set also needed extensive software. It was expected that the routines replacing floating point arithmetic and the I/O chips would be written once, coded into one or more ROMs, and then that standard ROM set would be used in the various calculator models.

20] 156 Malone mentions the 1102 1K DRAM problems and erroneously states the 1103 1K DRAM would be based on the 1102 core. Les Vadasz had told me of the difficulty caused by the 1102s need for an intermediate voltage generator. That generator was required because the 1102 used a single word line that required three different operating levels: unselected, read selected and write selected. Generating the read selected level was the problem, so I suggested to Les that by using 2 word lines, i.e. separate read and write, the intermediate level could be eliminated, but at the cost of a somewhat larger memory cell. Les liked the idea and urged me to file for a patent on that approach. The patent issued may have been Intel’s first. It soon became known that certain types of coupling on the 1103 DRAM chip could cause memory loss due to induced bipolar transistor action–solved by adding substrate bias and using an 18-lead package. I understand my patent was the only one disclosing a 3-transistor DRAM cell for which substrate bias could be applied.

21] 166 In discussing some events of 1970, Malone omits that in January, 1970 Bob Graham and I predicted that semiconductor memory would replace magnetic core menory in an Electronic Products magazine article. This article states that semiconductor memory would be priced below a penny per bit by 1972, at which point magnetic core memory could not be able to compete (despite its advantage of inherent non volatility).

22] 179 Malone mentions using established programming languages to make microprocessors work, but omits how that was accomplished. Intel found various ways to develop support for them–including Gary Kildall’s development of PL/M.

23] 179 In discussing marketing for the microprocessors, Malone cannot seem to understand that there were markets other than replacing mainframe computers or minicomputers. Within Intel, we were developing a story to tell to a new class of customers. Faggin and I had discovered that the MCS-4 chip set was fantastic for solving logic design problems, e.g. Faggin had to build testers, and I had to build programmers for PROMs and EPROMs. We concluded that, if we as engineers find microprocessors so useful, there will be many more engineers out there that would feel the same way.

24] 182 Bob Graham’s “Intel Delivers” campaign included a policy of not talking about a product until it was on distributor’s shelves. Until that happened, many LSI products from other companies were touted, but were not (or never became) available.

25] 187 Malone, in discussing the goal of increasing the clock speed for an upgrade to the 8008, fails to adequately cover the role of Intel’s newly developed n-channel silicon gate process–inherently faster than the previous p-channel technology and the primary reason that clock rates could be increased.

26] 188 Malone mentions Intel’s board having objections to the microprocessor as diverting focus from semiconductor memory product development. One reason for the board’s concern was that entering the computer business could be perceived by memory customers as competition for their business. Those of us who wanted the microprocessor announced argued that we could avoid that impression if we did not tout microprocessors as replacing our computer customer’s systems. It soon became evident that even big computer vendors needed little controllers throughout their systems. Many had such processors on their drawing boards at the time Intel came out with its microprocessors. Those computer customers quickly adopted Intel microprocessor devices to meet their needs. Consider that even the IBM PC used a microcontroller just to communicate with its keyboard. If one purchased IBMs dot matrix printer with an IBM PC, that printer also contained a microcontroller. Thus an IBM PC with that printer would have two embedded controllers compared to one PC type microprocessor.

27] 191 Malone argues that marketing produced endless manuals, etc. The error in that statement was addressed in the previous ithistory.org blog post on “errors and corrections.” However, Malone omits that the user guide for the 4004 was written by Stan and myself.

28] 192 Malone expresses amazement that the EPROM was non-volatile, but omits what was really unique about it. All ROMs were non-volatile, but the EPROM was “field programmable” and could be reused after erasure. MOS ROMs were only available from a semiconductor manufacturer and were “mask programmed.” Bipolar PROMs were only programmable once. Therefore, the EROM was much more flexible for the user as it could be reprogrammed in the field and didn’t have to be discarded if there were changes to be made or programming errors (bugs) detected. Please see next omission on pg 192.

29] 192 Malone fails to understand the benefit of the EPROM. Before it, MOS ROMs had to be ordered from the semiconductor manufacturer–a process which could take weeks. The customer had to send his firmware to the factory which would make a mask containing that firmware, then wafers would be processed using that mask. Those wafers would be sorted, separated into chips, packaged and then tested again. Intel charged $600 for the first three units, then subsequent orders had a 50 piece minimum quantity at $25.50 per unit. With the EPROM a customer could debug his code and reprogram on the spot, a process taking less than a day, rather than weeks. The C1702 quartz-lid EPROM sold for $81 in single unit quantity (prices as of September 1972).

30] 192 Before Intel offered the Intellec development tools, it offered SIM boards which had been developed by my group. They appear in the Sept. 1972 price list. Marketing had originally wanted to give them away, but I argued that we should sell them because customers would need such a device for their microprocessor development and it would cost them more to develop it themselves than what we could sell them for while still making a tidy profit. If we didn’t charge for development aids, we would ultimately see them as a burden on profits and discontinue them.

31] 192 Malone’s comment that Intel’s microprocessor development systems would have outsold personal computers neglects the cost difference. To compete in the PC market, Intel would have had to reduce prices by an order of magnitude from what they could charge for a development system, which was sold in small quantities (often just one) to each customer developing microprocessor applications.

32] 192 Intel’s 1972 annual report stated that its 1103 DRAM was the largest selling semiconductor memory in the world.

33] 193 From the time the 8008 microprocessor came out, its sales volume grew exponentially over time. We had expected those sales to drop away rapidly after the 8080 microprocessor was announced (and shipped to customers), but instead 8008 sales just stopped rising–they continued at a steady rate for quite some time.

 


Ted Hoff: Errors & Corrections in Intel Trinity book by Michael Malone

September 12th, 2014 by Alan Weissberger

Editor’s NOTE:  This article was written by Ted Hoff, PhD EE and edited by Alan J. Weissberger, Chairman of the IEEE SV History Committee.

From Ted Hoff:

The errors listed below are in approximately the same order as they appear in Malone’s book. To aid the reviewer, chapters are identified in brackets.

[CH 14]

As of 1969, “CPU on a chip” was discussed in the electronics literature, but generally thought to be some time away–most CPUs were just too complex for the state of the semiconductor art at that time. Therefore, at the beginning of 1969, the microprocessor did not cross from “theory to possibility”–it was still not seen as feasible due to the limitations in the LSI processes. The state of the art was such that Intel’s 1101, a 256 bit MOS static RAM, was on the drawing board.

[Editor's Note: In addition to Intel, at least two systems companies- Fairchild Systems Technology and Four Phase Systems were designing "MOS LSI microprocessor" chip sets for internal use in late 1969. Fairchild's was for use as a micro-controller in its Sentry semiconductor tester systems. Four Phased Systems designed the AL1—an 8-bit bit slice CPU chip, containing eight registers and an ALU for use in their data terminals.]

Malone claims Busicom came to Intel to seek a CPU on a chip, but that claim is proved false by the fact that Busicom engineers rejected every suggestion that might have moved them in that direction. Their only interest was in a calculator chip set, and a calculator set is not a CPU.

Malone is also wrong in claiming I was thinking about a CPU on a chip at the time of the Busicom project. He is also wrong in claiming I had used minicomputers to design ICs before joining Intel. I had not used any computer smaller than the IBM 1130, which was typically a room-full installation. My only experiece with IC design was participating in a trial course at Stanford, where a partial layout of a few transistors was done with no usage of computers of any kind.

Representing the PDP-10 as a minicomputer is wrong–the PDP-10 was DECs top of the line mainframe. DECs PDP-8 was a minicomputer but its architecture was not appropriate for the Busicom project, and implying I used it is incorrect. The PDP-8 was a 12-bit word machine, and was not suitable for programs in ROM because of the way it processed subroutines.

I was not looking to build a general purpose processor. I did not “volunteer” to “manage” Busicom–I was asked to act as liaison, to assist the Busicom team achieve their technology transfer. I was willing to take it on, although refusing the request probably would have been unwise at this early time in my employment.

Malone’s implication I expected Busicom to request a computer-on-a-chip is a fabrication. I never expected that.

Stating that Busicom’s design had “morphed” into a “monster” from a more straightforward design is incorrect. Prior to the arrival of the Busicom team we had not seen details of their design–and upon seeing the details it seemed more difficult than we had been led to believe at the April meetings. Referring to me as “project director” is incorrect.

Citing the terms of the agreement between Intel and Busicom after the arrival of the Busicom engineers is misleading. The agreement, i.e. 60,000 chip sets (to be specified by Busicom at a later time) were to be sold by Intel at a price not to exceed $50.00, was signed in April, some two months before the Busicom engineering team arrived.  The agreement was not revisited after the Busicom engineers arrived at Intel.

Stating that the Intel/Busicom design would fail “catastrophically” and Intel would be left “high and dry” misrepresents my conclusions. Rather I was concerned that it would be difficult to meet the cost targets because of package requirements and chip complexity, and that the number and complexity of chips needed would burden Intel’s limited design staff such that it could impact our work on memory.

I never considered that Busicom was “blowing” a product opportunity, nor did I know how to fix the problems at this time. These statements are just more of Malone’s fabrication. After I took my concerns to my immediate supervisor, Bob Noyce, he suggested I try to see if there might be a way to simplify the set and authorized me to work with the Busicom engineers. At that point in time there were no discussions of applications other than the Busicom calculators. My work amounted to making a few suggestions as to how some simplifications might be accomplished. The Busicom team listened, but preferred to do their own simplifcation. They did take time to critique some of my ideas, pointing out where problems might arise.

Malone insists that my work was a secret, but if it were, how could the Busicom engineers cite what it lacked?

Malone states I was burning up time, and working on a small-chip concept. That is not what was happening at all. Busicom had its own approach, and I was suggesting some modifications that I felt would make the job easier. Part of my job assignment at this time  was to work with the Busicom engineers and with Bob Noyce’s assent, felt justified in learning more of Busicom’s design to see where some reduction in complexity might be found.

Stating that I was telling Bob Noyce I wanted to emulate a computer is another fabrication. I did make use of my knowledge of computers and how complex problems are solved using programs in the effort to simplify the chip set. The set already had read-only-memory (ROM) and the most obvious ways to simplify the set seemed to be to move some functions from hardware to ROM. That is not the same as starting from  scratch with a general-purpose CPU. When Shima, et.al., objected that some function was missing, I would show how code in ROM could implement that function when using a simplified structure. The Busicom chip set already needed firmware, so my suggestions only involved some modest additional coding.

My discussions with Noyce were about chip set simplification and the Busicom engineers reluctance to consider my suggestions. I was not trying to emulate a computer, rather to use computer-like techniques to simplify the set. Noyce encouraged me to continue even if the Busicom team was not ready to accept my proposals, as a possible back-up to what the Busicom team was developing.

Noyce’s questions about operating systems etc. are taken out of  context. Bob would come around quite frequently and talk about many issues, including computer technology. I believe he wanted to become more comfortable when talking to Intel memory customers, i.e. computer manufacturers. The discussion of operating system concepts had nothing to do with microprocessors at this point in time.

Malone’s claim I reported to Andy Grove is false! As noted above, I reported to Bob Noyce, and Bob was the only Intel signatory on the  April agreement. In my 14 years at Intel, I never reported directly to Grove. One more Malone fabrication.

There was no “skunk-works operation.” I did not give up working with the Busicom team nor cease trying to suggest simplifications to their design.

I was not needed to get the 1101 256 bit static RAM/semiconductor memory “out the door.”

Malone goes to great length to criticize Bob Noyce’s actions saying he had signed off on an unproven product that had a “tiny” chances of success? Noyce had just encouraged me to continue trying to get some simplification of the Busicom chip set to which we had already committed–any simplification would have improved the chance of success.

Malone says the simplified chips were for a “market that might never exist.” He apparently forgot about those 60,000 chip sets we had  agreed to deliver–and my work represented only a possible simplification of their set requirements, and was a possible backup should Busicom’s engineers be unsuccessful in solving their complexity problem.

I was not at this point pursuing a processor design. However, every attempt to simplify the Busicom set tended to move me in the direction of a more general purpose–more programmable architecture.

Malone claims Bob gone “renegade” on his own company–just because he authorized work toward making a customer’s requirements more compatible with his own company’s? I believe most would consider his decision a prudent way to try to keep the Busicom project something that might benefit Intel.

I did not work mostly alone as Malone states–I continued discussions with the Busicom team, and was in communication with the MOS designers to ensure any suggestion I might make was consistent with Intel’s MOS design capability. I had other tasks as well, but in general did not involve putting out “fires.” The closest event to a “fire” was just before the first 1101 wafers with a chance of working were to come out of fab. Andy told me that functional testers weren’t ready and asked if I could help. I threw together a very crude tester over the weekend, and used it to test two wafers. We found 13 good devices on one, two on the other, and celebrated with champagne.

My work on the Busicom project took more like two rather than three months, i.e. July and August, 1969. By the end of that period, the suggestions I had been making pretty much added up to the architectural structure for what would be the 4004 CPU.

Malone continues to insist the project was secret, and then claims that working with a customer to match its requirements to Intel’s capabilities was a potential scandal. If so, perhaps all engineering should be outlawed?

Malone incorrectly states I hired Stan Mazor, because I felt deficient in software. In fact, Stan had been working in computer architecture, and at last I would have someone I could collaborate with. Most of the architecture, etc. was done by the time Stan arrived, but he could help put the whole package together.

Unlike Malone’s implication, I had been in frequent communication with Bob Graham, and again the project was not secret.

I did not have much to do with the 1102 (Intel’s first 1K DRAM), other than hearing about its problems from Les Vadasz. Malone falsely states the 1103 1K DRAM used the 1102 “core” in spite of earlier statements to the effect Gordon Moore wanted the 1103 to be independent of the 1102.

The “new project” passage gets twisted by previous errors. Andy Grove may have been upset with a new burden, but this task just represented the Busicom obligation coming due, not really a “new” project.

[CH 15]

Malone argues that Faggin was the only one who could have designed the 4004 chip set, but consider that it was if anything less complex than some of the chips of the original Busicom calculator set. One of the reasons Intel was chosen by Busicom was that it was perhaps the only semiconductor company not yet doing calculator chips for Busicom competitors. How did those semiconductor companies get their calculator chips designed?  For example, Mostek designed a single-chip calculator for Busicom, as reported in the February, 1971 issue of Electronics magazine. That chip had 2100 transistors, which was very close to the 4004 transistor count.

Bootstrap circuits were well known in metal gate MOS, where gate overlap could be controlled. Initially there were questions of silicon gate applicability to shift registers because they used such techniques. Intel found it could make shift registers using silicon gate MOS, and offering shift registers played a role in forging the connection to CTC.

The set of four chips was officially known as the MCS-4 family. The 4004 was a CPU on a chip, because the other chips in the set were memory and I/O. The interface logic on the 4001 and 4002 chips helped to eliminate the “glue logic” that subsequent microprocessors needed–thus making the 4004 more of a single-chip CPU than subsequent microprocessors. Later the 4008 and 4009 chips were provided to perform the glue logic function and allow non-family memory chips to be used with the 4004 as well.

Malone’s explanation of bytes and digits is incorrect. Proper terms are: bit (has only two states), a nibble (4 bits), a digit (4-bits for Binary Coded Decimal (BCD);  limited to the range from 0 to 9), a byte (8 bits) and a word (can be many different bit lengths). The 4004 was a 4-bit processor, not a 4-digit processor.   Modern microprocessors are typically 32 or 64 bits, not digits. Also one must separate data quantum size from data path width. For example, the 8088, used in the original IBM PC, processed most data in 16-bit sizes, but used a data path/bus only 8-bits wide.

Stan Mazor was more than a computer programmer. At the time of the dual presentation meeting (pg 154) the CPU of the Intel proposal consisted of two chips, designated “arithmetic” and “timing.” Later Stan suggested combining the two–leading to a true CPU on a chip.

Again Malone mis-labels the MCS-4 work as secret. The only resources involved until MOS design began were the modest efforts of Stan and myself. Had Intel been required to design and manufacture the original Busicom chip set, Faggin and Shima would have needed considerable extra design staff–or would have taken several more years to complete the set. Consider that the MCS-4 family was one complex logic chip, two memory chips, and one fairly simple I/O expander. Even the reduced Busicom set would have been 8 complex logic chips and two memory chips.

On pages 252-253, Malone notes that 1975 had been the most miserable year to date for Intel. and the “company’s factory in Peking, a key part of the manufacturing, burned to the ground.” A U.S. company having a factory in Peking (now known as Beijing) in 1975 would have been quite unusual–China was still closed to the rest of the world and the U.S. didn’t have diplomatic relations with China till January 1, 1979 .  That Intel factory was actually in Penang, Malaysia (Source: Intel 1975 Annual Report). The 1975 Intel report goes on to note that a massive effort allowed them to recover with minimum problems for their customers. It also noted that insurance claims were being filed.

[CH 16]

There is no indication Intel would have gone into the microprocessor business without the Busicom project. It is more likely that companies making logic sets, e.g. TTL, would have ultimately made the first CPU on a chip. They would have made increasingly complex slice chips, and added program sequence controllers, then finally combined all.

[ch 17]

Again, Malone mistates the nature of the 1103 1K DRAM.  It was not built on the Honeywell core.

Malone wrongly asserts that Bob Noyce had taken on a long-shot project that was secret, etc.–all fabrication.

[ch 18]

Malone is wrong in stating I lobbied against announcing, I only cautioned against overselling. I urged we identify new uses for computers, for example those that had been done by relays, SSI/MSI logic, etc.

The argument about customers needing to learn programming was an urge to offer certain types of support, not in opposition to announcing the product.

Stan Mazor who was the primary contact with Computer Terminal Corp. (CTC).  It was Stan who made the proposals to them, not myself.

Hal Feeney reported to Les Vadasz, he was not one of my “subordinates.”

Malone took a comment about computers as big expensive pieces of equipment way out of context. There were some skeptics who had a difficult time grasping the concept that a computer could be inexpensive. Fortunately, they were in a minority.

Malone talks of throwing away a $400 chip set. Why would one throw away a whole set if only one chip is bad? If the CPU chip was tossed, it would represent $30.00 (100 quantity) as of Sept. 1972.

I never lobbied against marketing the microprocessors, only against claiming them to be minicomputer replacements.  Again Malone is wrong in these assertions.

Minicomputers of that day were about the size of a portable TV set, or the traditional “breadbox,” not a couple of refrigerators as Malone states. They cost about $10,000, not a couple of hundred thousand dollars as Malone claims.

A 4004 microprocessor chip set, consisting of the four chips, cost $136 in single quantity in Sept. 1972, – not $400. In 100 quantity, that set cost $63.

We were not offering the set(s) to replace mainframes–it was a new market, extending computing power into areas unthinkable a few  years prior to that time.  For many years, the industry refers to that market as “embedded control.” It should be noted that minicomputers were not replacements for mainframe computers either. Minicomputers created new markets for computers in many industries, including process control, laboratory instrumentation, test systems, etc.

Malone reports Bob Graham’s comments in regard to minicomputers and market share out of context. Those comments came much earlier in 1971, regarding the issue of whether Intel should offer the chips as part of its product line, not at the time that marketing plans were being  developed.

Inside of Intel, the engineering side (e.g. Faggin and myself) saw tremendous potential – not for replacing big mainframe computers–but for what the industry refers to as embedded control.  For example, Faggin needed to build LSI testers, and I needed to build an EPROM programmer.  Microprocessor control made those jobs an order of magnitude easier than if we had used random logic and/or discrete components. We strongly believed there were other engineers (outside of Intel) that felt the same way we did about using microprocessors for (many) different types of embedded control applications.

Mainframe computers were solid state, but most were of a significantly higher level of performance than the first generation of microprocessors.   Most mainframes in the 1970’s and 80’s used ultra high speed Emitter Coupled Logic (ECL) for the CPU, which provided orders of magnitude higher performance than MOS microprocessors did in those years.

Mainframes were never our target market for the MCS4, 8008, 8080 or other MOS LSI microprocessors.

When I travelled on business with Bob Noyce, it was usually about memory. There was one major microprocessor promotional event, in 1972. Stan and I took three one-week trips over a period of five weeks, presenting the microprocessor concept. Attendance was well above original expectations and our message was very well received.

[ch 19]

Malone is wrong in stating the 8008 microprocessor was a “turbocharged” version of the 4004–in many applications the 8008 was slower than the 4004. Malone defends his statement with many erroneous numbers.

The 4004 clock speed was 740 kHz, not 108. The correct number was noted earlier in Malone’s book. The 8008 clock speed was 500 kHz, not 800. The 800 kHz speed was that of a later speed selected version of the 8008, known as the 8008-1, not yet available as of September, 1972. Further, the 8008 took two clock steps to do what the 4004 did in one.

Thus it was typically slower than the 4004, even at doing 8-bit arithmetic, and it needed a lot more glue logic than the 4004.

We had not been unsuccessful with the 4004.  The 4004 announcement in the Electroic News and at the 1971 Fall Joint Computer Conference generated a greater response than just about any other Intel advertisement

Again, Malone talks of replacing mainframes. He seems clueless about the area that was emerging, today called embedded control. At one meeting of microprocessor pioneers held in the 1990s, Shima reported microcontroller usage for embedded control was at least an order of magnitude greater than the use of microprocessors for PCs.

At Intel, designers sometimes called to see if we could help with a problem, and many of those calls were routed to me. One customer needed to get data from the bottom of an oil well–I asked him if he had heard about our microprocessors? He had not, so I had Intel marketing send him data, and soon we had another customer.

Malone is wrong in stating the 8008 was four chips, it was one. And The 8080 had moved some 8008 on-chip features off-chip, so it had somewhat greater memory needs than the 8008.

On-board ROM memory for the 8080 is incorrect–the 8080 still required external ROM for programs.

While the 8080 was introduced officially by Intel in April 1974, there had been pre-announcement activity and pre-announcement sales–an exception to Intel’s earlier policy. I’ve heard that at least 2,000 8080 devices were presold at a price of $360 each, such that development was fully paid for before the device was announced.

NOTE: This editor also heard same thing in March 1974. He presented the keynote speech and was on a microprocessor panel with Intel engineer Phil Tai at an early March 1974 IEEE Conference in Milwaukee, WI.  Mr. Tai described the 8080 and planned support chips BEFORE the parts were formally announced by Intel several months later. “$360 was the single quantity price for the 8080.” he said at the time.

…………………………………………………………………….

I did not consider my discussion with Bob Noyce as “almost shouting”–I just quietly pointed out that a postponement was actually a decision not to proceed at that time. It is also misleading to put this item here in the narration, as it occurred in the summer of 1971.

Malone statement “endless manuals” is very misleading. For the MCS-4 there was a data sheet of 12 pages, covering all 4 chips: CPU, ROM, RAM and I/O expander. The data sheet for the 3101A, a single chip in its second generation, ran 8 pages. We offered a MCS-4 user guide, some 122 pages, which taught how to use the family in many applications. But we also offered memory design handbooks to help customers with those products. The August, 1973 version ran to some 132 pages. We did produce a 6-page index-card sized quick reference that could fit in a shirt pocket. In visiting customers, it was always gratifying to hear them praise Intel’s level of support.

Malone claims the EPROM was unusual in that is was a non-volatile ROM.  By design, all EPROM/ROMs were non-volatile so they could retain stored information with no power applied.   They were intended to serve as instruction/program memory (AKA “firmware”) for micro-controller applications.  It is hard to imagine a more useless component than a volatile ROM.  

Malone totally misrepresents the advantages offered by the EPROM. Before it, a customer using a MOS ROM had to send code to the semiconductor factory, where a mask would be made, wafers processed, then sorted, separated, packaged and tested again. The procedure could take weeks. With the EPROM, a customer could load his firmware into it by himself, not have to order parts from the factory with the code already installed. The customer could debug his code, make corrections, and erase and reuse his EPROM, all in about an hour, not weeks.

Malone states for 1972 Intel had $18 million in revenue and was unprofitable. According to Intel’s 1972 annual report, the company had over $23 million in revenue and over $1.9 million in profit.

Malone states Intel’s 1972 staff could fit in a large conference  room. Intel’s 1972 annual report noted 1002 employees, so it would have been quite a large conference room.

Malone describes me coming back from speeches noting a “sea change.” After the tour of 1972 I gave relatively few speeches, and never saw a “sea change.”

The 8080 was not the first single chip microprocessor–it required more glue logic chips than the 4004. The 4004 was the first commercially available, single chip microprocessor.

Malone claims Intel gave no credit to Faggin for 30 years. Again wrong! Bob Noyce and I co-authored an article for the initial issue of IEEE Micro magazine (February, 1981) in which we gave credit to Faggin and Shima, and included a photo of Shima. A  November/December 1981 issue of Solutions (A Publication of Intel Corporation) states that the microprocessor chip design proceeded in 1970 under the guidance of Dr. Federico Faggin. and that Dr. Faggin would later found one of the most innovative microprocessor firms, Zilog, Inc

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Summary & Conclusions:

From my read of the Intel Trinity book, it seems that Malone gets some idea or notion in his head, then does not let reality interfere with his fantasies.  He appears to assume my motive was to do a CPU on a chip, regardless of its consequences to Intel, and that for some unknown reason Bob Noyce acquiesced.  In reality, I was just trying to simplify a chip set we had already agreed to manufacture and sell.  It just happened that to achieve the most simplification, a simple processor turned out to be the best solution for the Busicom calculator project.

Malone evidently can’t comprehend embedded control, which in terms of numbers accounts for much more usage of microprocessors than PCs. He cannot seem to grasp there are any uses for computers of any type, minicomputer, microprocessor, microcontroller, other than as mainframe replacement, when even minicomputers did not perform that function.  Minicomputers were mostly used for control of real time systems, like supervisory and process control in the late 1960s and early 1970s.  Not as mainframe replacements for heavy duty number crunching.

Note: the Editor worked on a minicomputer controlled integrated circuit test system at Raytheon Digital System Lab from 1968-69 and from 1970-73 on a minicomputer command & control/telemetry system for the Rinconda (Santa Clara County) water treatment plan.   Later, many process control, machine and device controller functions used one or more microprocessors, which replaced minicomputers and lots of random logic.

[Weissberger's paper on Microprocessor Control in the Processing Plant was published in an IEEE Journal in 1974-75 and is available for download on IEEE Xplore.]

By being unable to comprehend any usage for microprocessors other than in PCs, Malone misses the major use of microprocessors, especially embedded control in the early to late 1970s. The amazing fact is that microprocessors became commercially available in 1971 (MCS4 chip set), but PC’s didn’t come out till the late 1970s- early 1980s (the IBM PC was introduced in summer of 1981).   So how could early microprocessors be directed at PCs when none existed till 1977 and the industry really didn’t gain traction till the IBM PC in 1981?

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Note: The next article in this series will be on the glaring omissions/credit not given in Malone’s Intel Trinity book. While the author of this article (Ted Hoff) is most noted for his co-invention of the microprocessor, his work at Intel on semiconductor memories and LSI codec/filters were at least, if not more important. That can be verified by the IEEE CNSV Oct 2013 panel session on Intel’s transition to success. Here are some links related to this event: http://www.californiaconsultants.org/events.cfm/item/200

Full event video
Program Slides
Five photos from the event
Event Summary
National Geographic 1982 Story “The Chip”

References:

Author Michael Malone at the Commonwealth Club: The Story Behind Intel

Inventor Ted Hoff’s Keynote @ World IP Day- April 26, 2013 in San Jose, CA 

 


Author Michael Malone at the Commonwealth Club: The Story Behind Intel

September 9th, 2014 by Alan Weissberger

On August 6, 2014, Michael Malone, Author of The Intel Trinity, spoke at the Commonwealth Club of Silicon Valley.  The program was held  in the upper galleries of the Tech Museum in San Jose, CA.

Similar to his earlier speech at the Computer History Museum, Mr. Malone emphasized the evolution, leaders, and current direction of Silicon Valley technology.   The history of Intel and its three great leaders- Bob Noyce, Gordon Moore, and Andy Grove – was discussed only in metaphors and general terms.  The few examples he provided seemed to be historically inaccurate, based on this author’s recollection.

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The Commonwealth Club event abstract  states: “From his unprecedented access through the corporate archives, Malone has chronicled the company’s history and will offer his thoughts on some of the formidable challenges Intel faces in the future.”

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In my opinion, the most important thing Malone said during his talk (including the Q&A session) was that Intel was the “keeper of Moore’s law,” which has been responsible for almost all the advances in electronics for several decades.  That’s due to Intel being able to continue to  advance the state of the art in semiconductor processing and manufacturing which enables them to pack more transistors on a given die size, increase speed, and reduce power consumption.

Another important point Malone made is that the willingness to take risks and “good failure” are important aspects of Silicon Valley’s innovation process.   The right kind of failure can be a career booster.  For example, leadership, vision and high confidence of a CEO/CTO of a failed start-up is valued more than a lucky success.  Malone said that ~95% of Silicon Valley companies fail, and that few companies maintain their lead for more than a few years.  He’s certainly right about that!

Next came what appeared to be a contradiction.  “Our acceptance of failure and even good failure is overrated,” he said.  That’s because a failure can not be equated with success.  “When it occurs, failure is what it .But if you learn from your failure deeply enough and apply those lessons to your next job/start-up it is a good failure” (and, therefore, a very good thing).

How has Silicon Valley gained worldwide respect for innovation and tech leadership? “People here in Silicon Valley have learned to learn and change for the better as a result of their good failures.” So how then can a “good failure” be “over rated” if it’s a key ingredient of the success story of Silicon Valley?

“Intel has made more mistakes/failed more than any company I’ve ever studied,”  Malone opined.  He then qualified that statement saying “Intel failed in a positive way.  Intel has taken more risks over the last half century than probably any company.”  To continue to progress Moore’s law, “Intel is required to take four or more existentialist risks per decade,” Malone added.  We can’t disagree with that, as continuing to invest in wafer fabs and new semiconductor processes is risky and expensive.

“Intel is that rarest of company’s- one that has learned how to learn; turn a failure into a good failure and a success.”

[That was certainly true till 2007, when Apple introduced the iPhone and the mobile computing boom started.  Intel has no- cceeded in mobile computing as they invested in and was the cheerleader for WiMAX - a failed "4G" wireless technology.  The company didn't invest in LTE which, almost all wireless telcos were committed to for "4G."  Also, Intel was not able to reduce power consumption of its AToM processor, so was unable to compete with ARM Ltd's CPU core (used in over 90% of all mobile devices).  Despite several acquisitions (especially Infineon's telecom chip group) there are still no LTE chips or SoC's from Intel.  Nor have they captured significant market share of microprocessors used as "the brains" of mobile devices.]

Malone then goes on to tell the story of Intel’s first microprocessor (the 4004), as he does in his book.  [According to Intel insiders I know, that story is highly inaccurate. We will explain why in a follow up article.]

Malone makes it seems like the invention of the Intel 4004 was a mistake, because Intel was an upstart semiconductor memory company and took on the Busicom calculator/ custom chip-set project because they needed the money to survive.  According to Malone,  Intel turned that mistake around and created the microprocessor chip business, even though no one at Intel really knew what that business was about or would evolve into .  Malone claims that after a few years (date not specified) the entire Intel management team was behind the decision to ditch memories and become a microprocessor company with only two EXCEPTIONS (who presumably were not aware of that decision) — Intel’s CEO (Bob Noyce) and Chairman of the Board (Arthur Rock).  Really?  A totally different account of Intel’s transition from a memory to microprocessor company is detailed here (Oct 2013 IEEE program video segments and slides available).

It’s beyond the scope of this article to analyze and debate Malone’s account of Intel entering and committing big bucks to the microprocessor business.  What’s surprising is Malone didn’t even mention the 8008 or 8080 microprocessors during his talk.  Or the competition Intel faced in the mid 1970s from National Semiconductor, Motorola, and Zilog.

Next, was the tale of “Operation Crush” – Intel was threatened by Motorola’s new microprocessor- the 68000 around 1979-1980. So the company “locked up its management team for four days to come up with a response,” which was reportedly a statement that “we will offer a systems solution,”  e.g. development system, in circuit emulator, peripheral chips, etc.  Really?  Intel had been providing those tools and support LSI chips since the 8080 microprocessor came out in 1975.

The true story of “Operation Crush” is chronicled by an article on the Intel website. It’s goal was to get 2,000 “design wins*” for the 8086/88 microprocessors within a year after its launch in 1980.  It did better than that with 2,500 design wins, including IBM’s selection of the 8088 for their first PC.

Dave House (a classmate of this author at Northeastern University MSEE program- 1968-69), was a leader in that process- he proposed the 8088 with compatible 8 bit bus peripheral chips after IBM had rejected the 8086.  House is also quoted on why Operation Crush was a success in the aforementioned article on Intel’s website.  Yet Mr. House was not mentioned in Malone’s speech and gets no credit whatsoever in his book.

*  A “design win” is a new customer selecting and ordering a given component/module for its systems design.

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Another very interesting point Malone made was that Silicon Valley lacks a voice/ role model/ tech business leader it once relied on. He began by chronicling the leaders/icons/spokesmen for the Valley over time.

The first “Mayor of Silicon Valley,” Malone said, was Stanford’s Fred Terman, who fostered University-Industry cooperation via the Stanford Research Park and paved the way for the valley’s tech future. The second was Hewlett-Packard founder David Packard; and the third was Intel co-founder Bob Noyce, whose death at age 62 in 1990 created the regional leadership vacuum we still have.

“With Noyce’s death, who was going to take his place?” Malone wondered. “The next guys in line were Steve Jobs and Larry Ellison. You weren’t going to put those guys in charge of a community.”

“This valley needs some sort of strong leadership and a well recognized spokesman,” he said. “Until we get that, this valley’s going to speak in a lot of different voices. We really need to speak with a single voice here,” he added.

“Perhaps that voice (they Mayor of Silicon Valley) might be (Stanford President) John Hennessy,” Malone said.  But that’s not likely, he added, because Malone believes Hennessy wants to retire soon and move to a beach home or equivalent retirement paradise.

[A 1.5 hour interview this author did with Professor Hennessy can be viewed here along with comments on the event from the Professor and attendees.  The individual captioned video segments are here]

Related excerpt from WSJ OP ED on August 22, 2014:

Why Silicon Valley Will Continue to Rule the Tech Economy  (on-line subscription required)

Human talent and research and design labs are arriving to dominate the new era of devices.
This shift is already under way. The epicenter of Silicon Valley has always migrated. With the return to hardware, it is now preparing to leap back to where it began 75 years ago—to Mountain View……

Finally, Silicon Valley needs a de facto “mayor,” the person who represents its broad interests, and not those of a particular company, industry or advocacy groups. The Valley began with such individuals—Stanford’s Fred Terman, Dave Packard and then Intel founder Robert Noyce. But that ended with Noyce’s premature death in 1990. Now, poised to reinvent itself one more time and lead the global economy again, Silicon Valley needs another leader to address the great changes to come.

Closing Question:  Why did Malone continue as a journalist despite being so close to the leaders of Silicon Valley?

Malone said he grew up in Mt. View from 1963 and then moved to Sunnyvale later in the decade.  In the late 1960s,  he knew Steve Jobs from elementary school and his buddies were on the swim team with Steve Wozniak.  But it gets a whole lot more cozy than that!

“On a given afternoon in the 1960s, Ted Hoff, Bob Noyce, and Wozniak were all crossing each other on a corner very near my home (in Sunnyvale, CA).”  He infers he knew all of them very well along with David Packard (who wrote his grad school recommendation letter) and other Silicon Valley celebrities.

[NOTE: Go to 1:07 of the event audio to hear it yourself!]

“Longitudinally, I’ve seen all of Silicon Valley, he said.  “It was all right there in my backyard.”

Closing Comment:

There’s at least one problem with the assertion that Hoff, Noyce, and Wozniak were buzzing around Malone’s corner street in the late 1960s:  Ted Hoff, PhD, did not know Malone in the 1960s and he didn’t live in Sunnyvale during that entire decade!

We will be back with Mr. Hoff’s rebuttal to Malone’s Intel Trinity book in a future blog post.    Here is the first one:

Ted Hoff: Errors & Corrections in Intel Trinity book by Michael Malone

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The Evolution of the Desk

September 8th, 2014 by Katie Miller

A group of students at the Harvard Innovation Lab have created a time-lapsed visualization of the impact of computers, IT, and technology on our lives. The video provides a historical review of the office desk, beginning from the 1980s all the way to present day. The opening scene introduces a desk cluttered with what are now seemingly archaic items – a fax machine, a rolodex, a globe, a radio/alarm clock, a corded phone, an encyclopedia, Yellowpages, glue, tape, scissors, a Polaroid camera, and even an Oxford American Dictionary.

evolution1

The computer is a Macintosh 128K, the original Macintosh personal computer, released simply as the Apple Macintosh.  It originally sold for $2,495 ($5,595 in inflation-adjusted terms) and was the first personal computer with a graphic user interface – something that previously only available on hardware that cost more than $100,000.  The Macintosh had 128 KB of memory and an 8 MHz CPU made by Motorola, along with a 400 KB, single-sided 3.5-inch floppy disk drive.

As the 1980’s progress, we see the Macintosh making way to a more modern laptop, an IBM Thinkpad.  We also see the calculator getting sucked into the computer screen by a Microsoft Excel logo, signaling the emergence of the first spreadsheet programs that were available with a graphical interface in 1985. Shortly after, the glue, tape, and scissors get replaced by Powerpoint, which was launched by Microsoft in 1992 and quickly became the leading slideshow presentation program in the world.

evolution2

By the mid 1990’s, software and Internet applications begin to disrupt many of the items on the desk. We see an Amazon icon replacing the catalog on the bottom left corner of the desk, a Dictionary.com logo usurping the Oxford American Dictionary, and the classifieds making way to the emergence of Craigslist.

We also see a radical in the world of publishing, as the notepad gets replaced by Blogger and the fax machine disappears in favor of Adobe Acrobat and the PDF standard.

evolution3

2004 is when the pace of innovation really begins to accelerate, with Google leading the charge.  Google Maps replaces the globe, Gmail wipes away the envelopes, and the calendar on the wall makes way to Google Calendar. Facebook also makes a huge dent replacing our contact and address books, while Skype and Pandora disrupt the phone and radio, respectively.

In 2006, we see a refresh of the laptop to the MacBook Pro, and from there, the pace of innovation really begins to take off.  YouTube, Yelp, LinkedIn, and Wikipedia all make their entrance in place of the photograph, the Yellowpages, the rolodex, and the encyclopedia. But it’s Google News that probably makes the most radical of disruptions, all but ending the relevance of traditional print newspapers.

evolution4

By 2008, we have a nearly empty desk, and this is where things really begin to take off.  Disruptive applications like Box and Dropbox introduce the concept of cloud file storage, while services like Square and PayPal optimize online payments and e-commerce. The last few years also see an emergence of the shared-service economy, with startups like Lyft, Uber, and Airbnb making a dent in traditional sectors like the hotel and taxi industries.

All in all, the visualization depicts the radical impact of technology over the last 35 years. Advancements in computer infrastructure, software, and IT have managed to declutter a desk full of dozens of physical items into a simple, empty surface consisting of just a laptop, and a phone.

Watch the full video here – Evolution of the Desk.


Bloodless Beige Boxes | The Story of an Artist and a Thinking Machine

September 2nd, 2014 by Michael Baylor

When was the last time you walked into a data center and were stopped dead in your tracks by the beauty of a computer?  Right, probably never. That is why you will most likely never see a computer in any art history books…but there is one that may well change that.

Even though there is amazing beauty in the intricate mesh of microelectronic circuits inside, most people never really get to see that. Instead, we have come to view a computer as nothing more than a box that we plug things into. That is most likely because there is more thought given to the exterior design of a toaster than most computers.

As a result, computers have become so utilitarian that we do whatever we can to avoid looking at them. We hide them under desks, in computer rooms & data centers and now apparently, we are so disgusted by the sight of them that we hide them in the Clouds (pun intended). By the way, have you ever seen a containerized Cloud data center? Now that is an abomination of computer design if there ever was one.

A Box is Just a Box

The fact is, most computer enclosures are relatively utilitarian. It is just a box after all and what’s inside is all that is important, right? At least that’s the way most computer manufacturers view it. Packaging is normally the last consideration that goes into the design of a computer. It’s not really even “design” at least in the artistic sense, other than the consideration of where to slice some holes for cables and ventilation.

But that’s not the way it was for Thinking Machines, the company that in the 1980’s was years ahead of its competition and without question, put the “sexy” into supercomputing.

Most technology companies adhere to the age old design philosophy that “form follows function” where form is reduced to the utilitarian minimum necessary to fulfill structural and functional requirements.

Thinking Machines however, recognized that few people would appreciate the extreme differences between the Connection Machine and any other computer in the world by simply looking at a boring beige enclosure. The Company wanted the outside to tell a story about the machine and convey the unique architecture that would be hidden from the human eye.

© Thinking Machines Corporation, 1987. Photo: Steve Grohe

© Thinking Machines Corporation, 1987. Photo: Steve Grohe

The design for the Connection Machine CM-1 and the subsequent enhanced version, the CM-2, was conceived by world renowned artist Tamiko Thiel. But just as the Connection Machine broke the mold on computer design, Ms. Thiel is not your average “artist”. Beyond the global accolades for her artistic work, she has a B.S. from Stanford in general engineering/product design and also an M.S. from MIT in mechanical engineering. She followed that with a stint at Akademie der Bildenden Kuenste (Academy of Fine Arts) in Munich and has broken new ground in the field of augmented reality with installations globally.

Tamiko wrote a beautiful essay entitled “The Design of the Connection Machine” where she describes in eloquent detail, the process of designing the “wardrobe” for the most technologically advanced and revolutionary machine of its time. She begins with a concise problem statement that unless you continue reading, understates the complexity of the design challenge she faced.

“Despite our ambitious goals for the appearance of the machine, Thinking Machines’ concern was based on a pragmatic need: to communicate to people that this was the first of a new generation of computers, unlike any machine they had seen before.”

Unlike Any Design They Had Seen Before

Tamiko’s quest to find a form began with the design of the magnificent machine itself. One of computing’s great engineering accomplishments was the physical design of the Connection Machine. 65,536 processors grouped 16 to a chip for a total of 4,096 chips.

She began the visioning process through a working session with none other than Nobel laureate Richard Feynman, who also worked at Thinking Machines during his time off from Cal Tech. Dr. Feynman helped her visualize the hypercube architecture so that she could begin the process of translating the internal design into an enclosure that would conjure up images of mad scientists working deep inside the Cheyenne mountain range.

In her essay, Tamiko wrote “The search for a form had to start with bare practicalities: how do you physically organize a machine with 65,536 processors? Is it physically possible to build it like a ‘normal’ machine, or would we have to wallpaper a room with boards, and weave a rat’s nest of cables between them? The processors were grouped 16 to a chip, making a total of 4,096 chips. These chips were to be wired together in a network having the shape of a 12-dimensional hypercube. The term ‘12-D,’ far from having to do with warp drives and extraterrestrials, had the practical but complicated meaning that each computer chip would be directly wired to 12 other chips in such a way that any two chips, and thereby the 16 processors contained in each chip,  could communicate with each other in 12 or less steps. This network would enable the rapid and flexible communication between processors that made the Connection Machine so effective.”

Let the Drama Begin

Tamiko’s design evoked emotion, something that is not normally associated with computers. The magnificent machine commanded attention and it was clear to anyone that saw it that this was no ordinary computer. It informed the viewer with authority; “I am new breed of supercomputer, a majestic machine that is capable of something very special.”

The final design, used for both the CM-1 and its faster successor, the CM-2, was a massive, 5 feet tall cube formed in turn of smaller cubes, representing the 12-dimensional hypercube structure of the network that connected the processors together.

“This hard geometric object, black, the non-color of sheer, static mass, was transparent, filled with a soft, constantly changing cloud of lights from the processor chips, red, the color of life and energy. It was the archetype of an electronic brain, a living, thinking machine.”

In fact, Steve Jobs was so impressed with her design for the Connection Machine that he wanted her to design the NeXT computer. Private communication from Joanna Hoffman, who was working at NeXT at that time, told Tamiko years later. Unfortunately, Thiel had already moved to Europe to study fine art, and was not to be found.

Richard Feynman in Apple's "Think Different" campaign

Richard Feynman in Apple’s “Think Different” campaign

Tamiko’s artistic prowess extended to the design of the last iteration of the Connection Machine, the CM-5. The CM-5 was designed by Maya Lin, the architect best known for the Vietnam Veterans Memorial in Washington DC. According to Thiel “I did play a small part in it: right at the end of the design I turned up in Boston, and Danny Hillis told me that the design, while beautiful, seemed to him to lack “life.” I spent a day looking at the machine and talking to Maya and Danny about it. I realized that what was missing was the sense that the machine was alive, which I had accomplished by making the doors of the CM-1/CM-2 transparent, so that the status lights inside could be seen as they flashed on and off with the processor activity. In the CM-5 these lights were moved to a separate, additional panel on the edge of each machine segment. I suggested that the sides of the CM-5 be made transparent. The reply was that this had been thought of, but the machine needed to be in a Faraday cage. Yes, a cage, I replied – the sides didn’t have to be solid, a mesh would suffice. And if the mesh occluded some lights some of the times, then when you walked around the machine the lights would appear and disappear, which would again give you the sense of a life inside of the machine. Danny loved the idea, but I never saw the CM-5 in person and don’t know if this was implemented or not.”

Lobbyists Outsmart the Thinking Machine
In spite of building the most advanced computer of its time and hands down the most beautiful, Thinking Machines was ultimately out-lobbied by its competitors and closed its doors in 1994. There are still a few of these machines left, a CM-2 in the collection of the Smithsonian Institution National Museum of American History, and one in the Computer History Museum in Mountain View, Silicon Valley, California.

The blood, sweat, intellect and artistry that went into the design of this magnificent machine created an archaeological artifact that will continue to astound future generations and the Tamiko Thiel design could stand side by side with any of the world’s great art treasures.

Bloodless beige boxes? I think not!

If you would like to know more about the artist, you can view samples of her work at http://www.tamikothiel.com/ where you can also order apparel with the original concept drawings that Tamiko created for her design of the Connection Machine like the one worn by Dr. Feynman in Apple’s “Think Different” campaign, shown above.

I would like to thank Ms. Thiel for her generous giving of time, insights and guidance in researching and creating this story.