NEC ACOS Series 77 System 500

The architecture of the S300, S400 and S500 was based on previously existing architectures (including that of the S200), with novel extensions. The features of the architecture were as follows: (1) A virtual computer was configured by introducing process concepts, so that multiple processes could share a single computer (in the physical sense) in terms of both time and space. (2) Providing a 2-dimensional address space and segmenting the main memory into logical units (segments) made it possible to correct or load logic in segment units, and this made programming easier. (3) It was possible to provide synchronization/management between processes by adopting the concept of physical events like input/output signals and attention signals, and logical events which are sent from other processes executing asynchronously with those events. Efficiency of input/output processing and exception handling was also improved. The S300, S400 and S500 were comprised of a central processing unit, an operator console, and 3 types of I/O subsystems -- i.e. the unit record subsystem, mass storage subsystem and magnetic tape subsystem. As logic ICs, the system used ECL with an average of 2 nanoseconds per gate in the central processing unit of the System 500, and TTL with an average of 5 nanoseconds per gate in the S300, S400 and S500. In the main memory unit, the S500 used 4K RAM, and the S300 and S400 used 1K RAM.