NEC ACOS System 630

The S610 and S630 employed technology from the ultra-large ACOS System 1500 Series, such as bipolar logic LSI with a delay time per gate of 250 picosec and 300 gates per chip, bipolar logic LSI with a delay time per gate of 350 picosec and 2,000 gates per chip, 4 kilobit bipolar RAM with an access time of 10 nanosec, and 256 kilobit DRAM. This made it possible to achieve high performance while maintaining compactness, with a cabinet floor area of 1 square meter or less. Adding a high-speed scientific operation processor (HSP) and integrated array processor (IAP) enabled high-level scientific/technical calculation capability.