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Bio/Description
A computer engineer and 1993 IBM Fellow, he has been at the forefront of several innovations that have shaped the computing industry over the past three decades. While working on his Ph.D. at Stanford in the 1970s, he invented what is still today considered the fastest way of adding numbers in a computer, the Kogge-Stone Adder process, an approach still used in microprocessors by Intel and other companies and generally considered the fastest adding design possible. He received his B.S. degree in Electrical Engineering from the University of Notre Dame in 1968; his M.S degree in Systems & Engineering Sciences from Syracuse University in August 1970 and his Ph.D. in Electrical Engineering from Stanford University in January 1973. He was with IBM, Federal Systems Division, from 1968 until 1994. During his time there, he was a co-inventor on over three dozen patents. His design of the Space Shuttle I/O processor at IBM was one of the first multithreaded computers, and the first to fly in space. He was the author of the first textbook on pipelining, a now ubiquitous technique for executing multiple instructions in a computer in parallel. At IBM, he was also the inventor of the world's first multi-core processor, EXECUBE, which he and his team placed on a memory chip in an early effort to solve the data bottleneck problem that Emu is solving today. In 1994, he joined the University of Notre Dame as a faculty member, the Ted H. McCourtney Professor of Computer Science and Engineering. While at Notre Dame, he has participated on a long series of projects aimed at achieving new levels of supercomputing performance by leveraging both technology and architecture. This includes proposing one of the three "petascale" architectures that emerged from the "Enabling Technologies for Petascale Computing" workshop, held in Feb. of 1994. These PIM-based concepts were developed through a long series of petascale development projects including HTMT and Cray's Cascade project, and in collaboration with Dr. Jay Brockman, PIM LITE - one of the first real chips architected to have processing next to memory. The work with Cray led to multiple patents on light weight and ultra-light weight multi-threading, the latter including conversion of traditional memory references into "traveling threads." Most recently, he led a team of some the nation?s most renowned computer professionals, commissioned by the U.S. Defense Advanced Research Projects Agency (DARPA), to explore what sorts of technologies engineers would need to build a supercomputer capable of executing a quintillion (a billion billion) mathematical operations per second. The results of this study were highlighted in a cover story on the Institute for Electrical and Electronic Engineers (IEEE) Spectrum magazine in February, 2011. In 1977 he was a Visiting Professor in the ECE Dept. at the University of Massachusetts, Amherst. From 1977 through 1994, he was also an Adjunct Professor in the Computer Science Dept. of the State University of New York at Binghamton. In August, 1994 he joined the University of Notre Dame as first holder of the endowed McCourtney Chair in Computer Science and Engineering (CSE). Beginning in the summer of 1997, he has been a Distinguished Visiting Scientist at the Center for Integrated Space Microsystems at JPL. He is also the Research Thrust Leader for Architecture in Notre Dame's Center for Nano Science and Technology. For the 2000-2001 academic year he was the Interim Schubmehl-Prein Chairman of the CSE Dept. at Notre Dame. From August, 2001 until Dec. 2008 he was the Associate Dean for Research, College of Engineering. Starting in the fall of 2003, he also has been a Concurrent Professor of Electrical Engineering. He was appointed an IEEE Fellow in 1990 and an IBM Fellow in 1993. As the developer of the space shuttle I/O processor, and a number of other important innovations, he was awarded the 2014 Charles Babbage Award at the Institute of Electrical and Electronics Engineers? (IEEE) 2014 International Parallel & Distributed Processing Symposium in Phoenix.
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Gender:
Male -
Noted For:
Designer of the Space Shuttle I/O processor which was one of the first multithreaded computers, and the first to fly in space -
Category of Achievement:
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More Info: