• 1987

Hardware Description

The S830, S910 and S930 employed technology from the ultra-large ACOS System 2000 Series, such as logic LSI with delay time per gate of 100 picosec and 1,000 gates per chip, logic LSI with a delay time per gate of 170 picosec and 4,000 gates per chip, 4 kilobit bipolar RAM with an access time of 10 nanosec, and 1 megabit DRAM. The price performance ratio was improved by employing technology to speed up the central processing unit, such as sophisticated pipeline techniques, and high-precision branch prediction methods.